FIG. 1 shows a III-nitride compound semiconductor light emitting device according to the prior art. As shown in FIG. 1, the light emitting device comprises the substrate 100, the buffer layer 200 epitaxially grown on the substrate 100, the n-type nitride semiconductor layer 300 epitaxially grown on the buffer layer 200, the active layer 400 epitaxially grown on the n-type nitride layer 300, the p-type nitride semiconductor layer 500 epitaxially grown on the active layer 400, the p-side electrode 600 formed on the p-type nitride semiconductor layer 500, the p-side bonding pad 700 formed on the p-side electrode 600, and the n-side electrode 800 formed on the n-type nitride semiconductor layer 301 exposed by mesa-etching of at least the p-type nitride semiconductor layer 500 and the active layer 400.
The substrate 100 can use a GaN-based substrate as a homogeneous substrate, and a sapphire substrate, a silicon carbide substrate or a silicon substrate as a heterogeneous substrate, but can use any other substrates on which nitride semiconductor layers can be grown.
The nitride semiconductor layers epitaxially grown on the substrate 100 are usually grown by means of MOCVD (Metal Organic Chemical Vapor Deposition) method.
The buffer layer 200 serves to reduce differences in lattice constant and the coefficient of thermal expansion between the heterogeneous substrate 100 and the nitride semiconductor. U.S. Pat. No. 5,122,845 discloses a technology in which an AlN buffer layer having a thickness of 100 Å to 500 Å is grown on a sapphire substrate at a temperature ranging from 380° C. to 800° C. U.S. Pat. No. 5,290,393 discloses a technology in which an Al(x)Ga(1−x)N (0≦x<1) buffer layer having a thickness of 10 Å to 5000 Å is grown on a sapphire substrate at a temperature ranging from 200° C. to 900° C. Korean Patent No. 10-0448352 discloses a technology in which a SiC buffer layer is grown at a temperature ranging from 600° C. to 990° C., and an In(x)Ga(1−x)N (0<x≦1) layer is grown on the SiC buffer layer.
In the n-type nitride semiconductor layer 300, at least a region (n-type contact layer) in which the n-side electrode 800 is formed is doped with an impurity. The n-type contact layer is preferably made of GaN and is doped with Si. U.S. Pat. No. 5,733,796 discloses a technology in which an n-type contact layer is doped with a desired doping concentration by controlling a mixing ratio of Si and other source materials. 
The active layer 400 is a layer for emitting a photon (light) by recombination of electrons and holes, and is mainly made of In(x)Ga(1−x)N (0<x≦1). The active layer 400 is composed of a single quantum well or multi quantum wells. WO02/021121 discloses a technology in which only some of a plurality of quantum wells and barrier layers are doped.
The p-type nitride semiconductor layer 500 is doped with an impurity such as Mg, and has a p-type conductivity through an activation process. U.S. Pat. No. 5,247,533 discloses a technology in which a p-type nitride semiconductor layer is activated by means of irradiation of electron beam. U.S. Pat. No. 5,306,662 discloses a technology in which a p-type nitride semiconductor layer is activated through annealing at a temperature of 400° C. or more. Korean Patent No. 10-043346 discloses a technology in which NH3 and a hydrazine-based source material are used together as a nitrogen precursor for growing a p-type nitride semiconductor layer, so that the p-type nitride semiconductor layer has a p-type conductivity without an activation process.
The p-side electrode 600 serves to allow the current to be supplied to the entire p-type nitride semiconductor layer 500. U.S. Pat. No. 5,563,422 discloses a technology of a light-transmitting electrode, which is formed almost on the entire p-type nitride semiconductor layer, in ohmic contact with the p-type nitride semiconductor layer, and made of Ni and Au. U.S. Pat. No. 6,515,306 discloses a technology of a light-transmitting electrode made of ITO(Indium Tin Oxide), which is formed on the n-type superlattice layer formed on the p-type nitride semiconductor layer.
Meanwhile, the p-side electrode 600 can be formed to have such a thick thickness that the p-side electrode 600 does not transmit light, i.e., the p-side electrode 600 reflects light toward the substrate. A light emitting device using this p-side electrode 600 is called a flip chip. U.S. Pat. No. 6,194,743 discloses a technology of an electrode structure including an Ag layer of 20 nm or more in thickness, a diffusion barrier layer covering the Ag layer, and a bonding layer made of Au and Al, which covers the diffusion barrier layer.
P-side bonding pad 700 and n-side electrode 800 are for providing current into the device and for wire-bonding out of the device. U.S. Pat. No. 5,563,422 discloses a technology of an n-side electrode made of Ti and Al. U.S. Pat. No. 5,652,434 discloses a technology of p-side bonding pad directly contacted with p-type nitride semiconductor layer by partially removing the light-transmitting electrode.
In a light emitting device, the most integral element is an active layer. Electrons and holes respectively formed in an n-side and a p-side are combined with each other together in a quantum-well layer of the active layer so as to emit light corresponding to the energy band of a quantum-well layer material. Therefore, the efficiency of the light emitting device is greatly influenced by the crystal quality of the active layer, particularly, a quantum-well layer, strain given to the quantum-well layer, the shape of the quantum-well layer and the like. Major parameters of the electrical and optical properties of the light emitting device are also largely dependent upon the above-mentioned factors.
III-nitride semiconductor light emitting devices usually employ heterogeneous substrates such as a sapphire substrate, a silicon carbide substrate or a silicon substrate. Inherently, lots of crystal defects are thus generated in a grown thin film. It is generally known that dislocations of 108 cm2 or more exist.
It is evident that these dislocations reduce the efficiency of the III-nitride semiconductor light emitting devices. However, the reason why the III-nitride semiconductor light emitting devices can show stabilized performance of some degrees even in spite of lots of dislocations is that the active layer has both characteristics of the quantum well and the quantum dot. Accordingly, in order to improve the performance of the light emitting device, especially, brightness, it is necessary to strengthen formation of this quantum dot. It is, however, not easy to strengthen the formation of this quantum dot only with existing thin film growth technology.
Further, strain formed in the active layer serves as an important factor having an influence on the properties of the active layer. A variety of differences occur between the photoluminescence (PL) characteristic and the electroluminescence (EL) characteristic of the light emitting device according to the strain. In this connection, the control of strain around the active layer or in the active layer itself becomes an important factor in order to improve the efficiency of the light emitting device.